Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling

By Rabi Mahapatra Ayan Mandal Sunil P Khatri, et al.

No Customer Reviews

Select Format

Select Condition

Book Overview

This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.

Format:Hardcover

Language:English

ISBN:1461494044

ISBN13:9781461494041

Release Date:November 2013

Publisher:Springer

Length:143 Pages

Weight:0.75 lbs.

Dimensions:0.6" x 6.0" x 9.0"

Related Subjects

Computers Computers & Technology Engineering Technology

Customer Reviews

0 rating

Write a review

ThriftBooks sells millions of used books at the lowest everyday prices. We personally assess every book's quality and offer rare, out-of-print treasures. We deliver the joy of reading in recyclable packaging with free standard shipping on US orders over $15. ThriftBooks.com. Read more. Spend less.

Copyright © 2025 Thriftbooks.com Terms of Use | Privacy Policy | Do Not Sell/Share My Personal Information | Cookie Policy | Cookie Preferences | Accessibility Statement
ThriftBooks ^® and the ThriftBooks ^® logo are registered trademarks of Thrift Books Global, LLC

Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling

Select Format

Select Condition

Recommended

Book Overview

Customer Reviews

Popular Categories

Website

My Account

Partnerships

Quick Help

About Us

Follow Us